13) FPGA Programming

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Details

  • Location: FrostFest/Frost Tower Rooftop
  • Troll: Crunchy Squishter

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Troll's Objective Message

Greetings Earthling! I'm Crunchy Squishter.

Hey, could you help me get this device on the table working? We've cobbled it together with primitive parts we've found on your home planet. We need an FPGA though - and someone who knows how to program them. If you haven't talked with Grody Goiterson by the Frostavator, you might get some FPGA tips there. Thank you! Now we're able to communicate with the rest of our people!

The terminal challenge for this objective is the terminal "Frostavator" offered by Gordy Goiterson. Solving this terminal challenge provides additional hints for this objective. To view the hints use the menu on the left.

To start this objective click on the "FPGA programming" next to Crunchy Squishter.

From the conference video for this objective, you know that you need to divide freq 100 to get the actual frequency:

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Also, to create the desired frequency square wave (freq), you would need to switch the output waveform twice per cycle. This means you need a timer that goes 2 x (freq) value. Taking into account the decimals and the input clock, you will need to switch output wave every 125MHZ/ (2 x * (freq/100)) count. In the code below this is called increment.

The other thing you need to take into account is the fact that it takes 0.5 clock cycle for the FPGA to reset. To build an accurate Square Wave generator you need to take this into account.

For this we actually count by 0.5 counts on every positive and negative clock edges. When the FPGA is reset, we set the counter to 0.5 to account for the reset.

Putting everything you get the following FPGA code to create square waves at requested frequency.

    // Note: For this lab, we will be working with QRP Corporation's CQC-11 FPGA.
    // The CQC-11 operates with a 125MHz clock.
    // Your design for a tone generator must support the following
    // inputs/outputs:
    // (NOTE: DO NOT CHANGE THE NAMES. OUR AUTOMATED GRADING TOOL
    // REQUIRES THE USE OF THESE NAMES!)
    // input clk - this will be connected to the 125MHz system clock
    // input rst - this will be connected to the system board's reset bus
    // input freq - a 32 bit integer indicating the required frequency
    //              (0 - 9999.99Hz) formatted as follows:
    //              32'hf1206 or 32'd987654 = 9876.54Hz
    // output wave_out - a square wave output of the desired frequency
    // you can create whatever other variables you need, but remember
    // to initialize them to something!

    `timescale 1ns/1ns
     module tone_generator (
        input clk,
        input rst,
        input [31:0] freq,
        output wave_out
     );
        // ---- DO NOT CHANGE THE CODE ABOVE THIS LINE ----
        // ---- IT IS NECESSARY FOR AUTOMATED ANALYSIS ----
        // TODO: Add your code below.
        // Remove the following line and add your own implementation.
        // Note: It's silly, but it compiles...


        reg wavey;
        assign wave_out = wavey;
        real counter;
        real increment = 125000000 / (freq*2/100);

        always @(edge clk or negedge rst)
        begin
            if (rst==1)
                begin
                    counter <=0.5;
                    wavey <=0;
                end
            else
                begin
                    if(counter >= increment)
                        begin
                            counter <= 0;
                            wavey <= wavey ^ 1'b1;

                        end
                    else
                        counter <= counter + 0.5;
                end
        end
    endmodule

Copy and paste the above code and simulate 500Hz, 1KHz, 2KHz, and random frequency.

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Once you complete this objective you will be given a FPGA item. You will need to plug the FPGA into the Speak &c Spell next to Crunchy Squishter.

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After this a spaceship appears which leads to the ending of the game.

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Santa tells you

The Frostians have reached out to me via video link. They’ve explained to me all that has happened. I’d like to thank you for your truly excellent work in foiling Jack’s plans and ensuring that he is finally brought to justice. On behalf of all of us here at the North Pole, we wish you and yours a happy and healthy Holiday Season. Thank you and HAPPY HOLIDAYS from me and all of the elves. Ho Ho Ho!

Answer

  // Note: For this lab, we will be working with QRP Corporation's CQC-11 FPGA.
  // The CQC-11 operates with a 125MHz clock.
  // Your design for a tone generator must support the following
  // inputs/outputs:
  // (NOTE: DO NOT CHANGE THE NAMES. OUR AUTOMATED GRADING TOOL
  // REQUIRES THE USE OF THESE NAMES!)
  // input clk - this will be connected to the 125MHz system clock
  // input rst - this will be connected to the system board's reset bus
  // input freq - a 32 bit integer indicating the required frequency
  //              (0 - 9999.99Hz) formatted as follows:
  //              32'hf1206 or 32'd987654 = 9876.54Hz
  // output wave_out - a square wave output of the desired frequency
  // you can create whatever other variables you need, but remember
  // to initialize them to something!

  `timescale 1ns/1ns
  module tone_generator (
      input clk,
      input rst,
      input [31:0] freq,
      output wave_out
  );
      // ---- DO NOT CHANGE THE CODE ABOVE THIS LINE ----
      // ---- IT IS NECESSARY FOR AUTOMATED ANALYSIS ----
      // TODO: Add your code below.
      // Remove the following line and add your own implementation.
      // Note: It's silly, but it compiles...


      reg wavey;
      assign wave_out = wavey;
      real counter;
      real increment = 125000000 / (freq*2/100);

      always @(edge clk or negedge rst)
      begin
          if (rst==1)
              begin
                  counter <=0.5;
                  wavey <=0;
              end
          else
              begin
                  if(counter >= increment)
                      begin
                          counter <= 0;
                          wavey <= wavey ^ 1'b1;

                      end
                  else
                      counter <= counter + 0.5;
              end
      end
  endmodule